Runtime configuration for coreboot

Main Room,

Currently coreboot limits update of many boot parameters such as FSP UPD, firmware configuration, devicetree settings etc. This limits developers/advanced users to change settings on the fly and requires recompilation of code which might not be everyone's forte. Last year we presented a talk on mitigating the FSP UPD setting issue using Micropython as a payload.Initially Micropython was enabled on coreboot using libpayload using QEMU platform and later extended for x86 platform to do initial proof-of-concept.

This lightning talk presents the demonstration of the earlier proposed design as well as improvements over the proposed design to make it architecture agnostic and more secure by aligning coreboot's existing infrastructure of security (vboot).

This holistic approach of updating configuration without recompilation of the image will allow coreboot to reach a wider audience and mitigate single most complaints from most of the OEM/ODMs who might want to change many configurations on the fly.